Tech News: 47µF on 0402

I found this while browsing the interwebs and thought it’s cool enough to do a small post. It’s a reasonably big deal, no-one seems to be discussing much on.

When selecting decoupling capacitors, you would ideally want to have the largest capacitor value in the smallest form factor to keep ESL/ESR in check. Capacitor manufacturer Murata claims that they have started the production of 47µF capacitors on a 0402 form factor(1mm x 0.5mm) design. Usually you don’t get these very large capacitor values in these small sizes. I am also hearing that, Samsung and Kyocera also have made the same 47µF in the 0402, but they in early R&D and production slated to start later this year.Previous largest in the same size was 22µF.
Why this matters is cap placement. 0402 lets you put serious capacitance values right next to power pins and BGA breakouts, which cuts loop inductance drastically. This means the Power Delivery Network is stable with these capacitors acting as the local energy reservoirs. Expect roughly 60% less mounting area than a 47µF 0603 part. This means you can have multiple of these caps in the same area. Meaning in phones, wearables, and AI server boards, around VRMs and GPU substrates, tighter placement can replace a chunk of mid-bulk caps and reduce the number of vias to ground. 
Murata caps seem to be X5R Class-II type with a rated voltage of 2.5V. So these are good for only 0.7 – 1.8 V rails. But the problem can be the DC bias. At the actual full DC voltage, capacitor value will be much lower as it’s a Class-II ceramic material. I tried to see if there are charts on Murata Simsurf tool, but they don’t seem to list these latest caps. So we need to wait till those are available for the general public.

But this is a good sign anyway. We will have the possibility of much bigger capacity caps for strong decoupling pretty soon. Keep a lookout for these in the future board designs.
Part Numbers: GRM158R60E476ME01D, CL05X476MS6N9W

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Tech Explained: eFPGAs

I’ve been exploring a few SoCs for a new project, and I ran across QuickLogic’s QuickFeather board with the EOS S3. It has an Arm Cortex M4F processor with an embedded FPGA. That made me realize many folks would benefit from a quick explainer on what an embedded FPGA is. Here it goes.

An eFPGA is reconfigurable hardware inside the chip. Think LEGO you can rearrange. You load a bitstream from flash at boot, control it like any other peripheral, and it runs next to the CPU with very low delay. You can keep it internal for accelerators or route its signals to pins through the normal pinmux.

eFPGA

Why this helps you? It gives you hardware speed for the complex parts of your design that keep changing. Think custom sensor timing, packet parsing, digital filters, cryptography, or tiny ML components. You move those time-consuming parts into hardware, and you free up clock cycles on your main processor firmware. Since it’s in hardware, responses come in deterministic time, it makes firmware less messy. Think of it as a programmable coprocessor which you can change into anything. You use it when you need tight timing, or for features you plan to revise after launch or potentially upgrades to certain algorithm blocks. It also helps when you want to try new ideas in the field without a new chip spin without massively worrying about what it does to your firmware.

Please don’t use it for simple projects. Your normal MCU with firmware changes, as we have all done till now, will work. If you are planning on using it, please make sure you have a plan to update devices safely, as it will definitely be needed.

Need to buy a EOS S3 board to try these out in detail. Anyone with practical experience with these chips/boards? How were they?

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