Tech Explained: Liquid damage detection in USB Type C Connector

USB Implementers Forum(The group responsible for maintaining and promoting USB standards) launched version r2.3 of the USB Type-C Cable and Connector Specification a couple of months ago. It has an interesting new feature addition giving manufacturers the freedom to create a new liquid detection pin in the standard USB Type C connector. Although the standard doesn’t mandate the exact location placement of the new pin/pads it gives general guidelines of where it can be placed. Check images. The two variations are a full-width pad running the entire length of the USB receptacle and the other being two small pads next to the VBUS and CC pins. The second one is placed in the areas where liquid corrosion is mostly found in the connectors. It will be present in both orientations.

Why is this a reasonably big deal? USB Type C connector is most likely going to be the single most common connector for virtually all human interaction interfaces for the next decade. A common failure point of this connector is liquid damage due to spilled water, coffee, sweat, falling in water etc. The liquid forms a bridge between the pins and when power is applied(5V or the higher voltage modes USB Fast chargers support) exposed metal will dissolve into free ions and these ions will migrate from one pin to another. This will form an oxide layer and it will create the greenish stuff you find when there is corrosion. These lead to improper connections or open circuits that will ruin the connector. With the new liquid detection pin, they’ve made some changes to the USB protocol standard. Now, when liquid is detected(via impedance or leakage measurement), the controller won’t turn on the USB power switch for that pin. It will even show a software error as a reminder to clean the port. No power means no electrolysis or corrosion. So, your connector stays in top shape. Apple is already doing this with the type C connectors in iPhones. Thumbs up to them!

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Back to Basics: FLOPs and Embedded Systems

In recent client discussions on FLOPs and the process of selecting embedded SoCs, I found it essential to share some insights here.

FLOPs or Floating Point Operations per second, is a metric used by computing folks to measure how many floating point operations your device can do per second. The larger the FLOPs, the faster the system processes computations. There are variants like GFLOPs, TFLOPs, PFLOPs denoting Giga, Tera, Peta, indicative of higher compute capabilities. Due to marketing pressures, we usually, see the theoretical FLOP numbers being mentioned in datasheets. The practical scenario introduces various factors, such as data access speed, that reduce this value heavily. FLOPs are usually practically calculated by having an equation similar to (a+(b*c)) involving 2 floating point operations of add and multiply called Fused Multiply Add (FMA), where processors with FMA support perform floating-point multiply-add operations in a single fused step.

While FLOPs are a relevant metric their significance in the embedded domain depends on the nature of the applications the embedded system will be running. Higher FLOPs often translate to a larger power budget, a potential deal-breaker for battery-operated systems. Embedded systems often require a balance between performance and power efficiency. Remember that.

Personally, I find CoreMark scoring to be a superior metric for embedded applications. It offers a singular figure per MHz or per mA indicating processing capabilities for power consumed.. I discuss CoreMark in older posts on my website, explaining why it stands out as a benchmark. But Alas, it hasn’t gained widespread traction, and manufacturers seldom include it in datasheets. It will change in the future I am sure.

In essence, the right processor for an embedded application rests on the specific requirements of that application. Just don’t go chasing FLOPs alone.

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